Quad Complementary-Output Elements DIP-16

For symmetrical generation of complementary TTL signals.

Specifications

• Series: 7400
• Package: PDIP-16
• Switching time skew of the complementary outputs is typically 0.5ns, not more than 3ns at rated loading
• Full fan-out to 20 high-level and 10 low-level 74 Loads
• Active pull-down provides square transfer characteristics

Applications

• Symmetrical clock/clock generators
• Complementary input circuit for decoders and code converter
• Switch debouncing
• Differential line driver