SPLD GAL Family 8 Macro Cells 41.6 MHz EECMOS Technology 5 Volt 20-Pin

Specifications

• High performance CMOS technology
• 50% to 75% reduction in power from bipolar
• active pull-ups on all pins
• E2 cell technology
• Eight output logic macrocells
• Preload and power-on reset of all registers

Applications

• DMA control
• State machine control
• High speed graphics processing
• Standard logic speed upgrade